1. Field of the Invention
This invention relates to the grinding or polishing of a workpiece, in particular the polishing of a semiconductor wafer surface to a high degree of planarity.
2. Description of the Related Art
In the manufacture if integrated circuits, for example, planarity of the underlying semiconductor substrate or wafer is very important. Critical geometries of integrated circuitry are presently in the neighborhood of less than 1 micron. These geometries are by necessity produced by photolithographic means: an image is optically or electromagnetically focused and chemically processed on the wafer. If the wafer surface is not sufficiently planar, some regions will be in focus and clearly defined, and other regions will not be defined well enough, resulting in a nonfunctional or less than optimal circuit. Planarity of semiconductor wafers is therefore necessary.
Chemical and mechanical means, and their combination (the combination being known as "mechanically enhanced chemical polishing"), have been employed, to effect planarity of a wafer. In mechanically enhanced chemical polishing, a chemical etch rate on high topographies of the wafer is assisted by mechanical energy.
FIGS. 1a and 1b illustrate the basic principles used in prior art mechanical wafer polishing. A ring-shaped section of a polishing pad rotates at W.sub.p radians per second (R/s) about axis O. A wafer to be polished is rotated at W.sub.W R/s in the opposite sense. The wafer may also be moved in directions +X and -X relative to O, the wafer face being pressed against the pad face to accomplish polishing. The pad face may not itself be abrasive. Actual removal of surface material from the wafer is often accomplished by a mechanically abrasive slurry, which may be chemically assisted by an etchant mixed in with the slurry.
FIG. 2 helps to clarify rotation W.sub.W and the ring shape of the pad in FIG. 1. For a generic circular pad rotating at W R/s, the linear speed of the polishing face at any given radius will vary according to the relationship L=W.times.R, where L is in cm/s for W in R/s and R in cm. It can be seen, for example, that linear speed L.sub.2 at large radius R.sub.2 is greater than linear speed L.sub.1 at small radius R.sub.1. Consider now that the pad has a surface contact rate with a workpiece that varies according to radius. Portions of a workpiece, such as a wafer, contacting the pad face at radius R.sub.1 experience a surface contact rate proportional to L.sub.1. Similarly, portions of the wafer contacting the pad face at radius R.sub.2 will experience a surface contact rate proportional to L.sub.2. Since L.sub.2 &gt;L.sub.1, it is apparent that a workpiece at radius R.sub.2 will receive more surface contact than a workpiece at radius R.sub.1. If a wafer is large enough in comparison to the pad to be polished at both R.sub.1 and R.sub.2, the wafer will be polished unevenly: the portions of the wafer at R.sub.2 will be polished faster than the portions of wafer at R.sub.1. The resulting non-planarity is not acceptable for high precision polishing required for semiconductor wafers.
Referring again to the prior art of FIG. 1, a common approach by which prior art attempts to overcome non-uniform surface contact rate is by using a ring-shaped pad or the outer circumference of a circular pad, to limit the difference between the largest usable radius and smallest usable radius, thus limiting surface contact rate variation across the pad face, and by moving the wafer and negatively rotating it, relative to the pad and its rotation. The combination is intended to limit the inherent variableness of the surface contact rate across the wafer, thereby minimizing non-planarity. Such movement of the wafer with respect to the polishing pad's axis of rotation requires special gearing and design tolerances to perform optimally.
It is an object of the present invention to provide a polishing pad capable of providing a substantially constant, radially independent surface contact rate, improving planarity of a workpiece polished thereby.